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 MCP9805
Memory Module Digital Temperature Sensor
Features
* Meets JEDEC Standard JC42.4 for Mobile Platform Memory Module Thermal Sensor * Temperature-to-Digital Converter * Accuracy with 0.25 C/LSb Resolution: - 1C (max.) from +75C to +95C - 2C (max.) from +40C to +125C - 3C (max.) from -20C to +125C * Programmable Temperature Monitor Boundary * Critical Temperature Output * Operating Voltage Range: 3.0V to 3.6V * 2-wire Interface: SMBus/Standard mode I2CTM Compatible * Operating Current: 200 A (typ.) * Shutdown Current: 0.1 A (typ.) * Available Packages: 2x3 DFN-8, TSSOP-8
Description
Microchip Technology Inc.'s MCP9805 digital temperature sensor converts temperatures between -40C and +125C to a digital word. This sensor is designed to meet the JEDEC standard JC42.4 for Mobile Platform Memory Module Thermal Sensor. This device provides an accuracy of 1C (max.) from a temperature range of +75C to +95C (active range) and 2C (max.) from +40C to +125C (monitor range) as defined in the JEDEC standard. The MCP9805 comes with user-programmable registers that provide flexibility for DIMM temperature-sensing applications. The registers allow user-selectable settings such as Shutdown or Low-Power modes and the specification of temperature event and critical output boundaries. When the temperature changes beyond the specified boundary limits, the MCP9805 outputs an Event signal. The user has the option of setting the Event output signal polarity as either an active-low or active-high comparator output for thermostat operation, or as a temperature event interrupt output for microprocessor-based systems. The Event output can also be configured as a critical temperature output. This sensor has a 2-wire industry-standard SMBus and Standard mode I2C compatible (100 kHz bus clock) serial interface protocol, allowing up to eight sensors to be controlled in a single serial bus. These features make the MCP9805 ideal for sophisticated multi-zone temperature-monitoring applications.
Typical Applications
* * * * Dual In-line Memory Module (DIMM) Personal Computers (PCs) and Servers Hard Disk Drives and Other PC Peripherals General Purpose Temperature Sensor
Typical Application
Memory Module
Memory Temperature Sensor MCP9805
Package Types
MCP9805
8-Pin DFN (2x3)
A0 1 A1 2 A2 3 GND 4 8 VDD 7 Event 6 SCLK 5 SDA
SPD* EEPROM
R
8-Pin TSSOP R
A0 1 A1 2 A2 3 8 VDD 7 Event 6 SCLK 5 SDA
3.3 VDD_SPD
SDA SCLK
Event
GND 4
* Serial Presence Detect
(c) 2005 Microchip Technology Inc.
DS21977B-page 1
MCP9805
1.0 ELECTRICAL CHARACTERISTICS
Notice: Stresses above those listed under "Maximum ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings
VDD ....................................................................... 6.0V Voltage at all Input/Output pins .... GND - 0.3V to 5.5V Storage temperature ..........................-65C to +150C Ambient temp. with power applied .....-40C to +125C Junction Temperature (TJ)................................ +150C ESD protection on all pins (HBM:MM)....... (4 kV:200V) Latch-Up Current at each pin ........................ 200 mA
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = 3.0V to 3.6V, GND = Ground and TA = -20C to +125C. Parameters Power Supply Operating Voltage Range Operating Current Shutdown Current Power-On Reset Threshold (POR) Power Supply Rejection VDD IDD ISHDN VPOR PSRDC PSRAC Temperature Sensor Accuracy Accuracy with 0.25 C/LSb Resolution: +75C to +95C +40C to +125C -20C to +125C TA = -40C Internal ADC Conversion Time (10-bits + Sign): 0.25 C/LSb Event Output (Open-Drain) High-Level Current (leakage) Low-Level Voltage Thermal Response Response Time (Note): DFN TSSOP Note: tRES tRES -- -- 0.7 1.5 -- -- s s Time to 63% of +22C (Air) to +125C (Oil Bath) IOH VOL -- -- -- -- 1 0.4 A V VOH = 3.6V IOL= 3 mA tCONV -- 65 125 ms 17 samples/sec. (typ.) TACY TACY TACY TACY -1.0 -2.0 -3.0 -- 0.5 1.0 2.0 2 +1.0 +2.0 +3.0 -- C C C C Active Temp. Range Monitor Temp. Range 3.0 -- -- -- -- -- -- 200 0.1 2.2 0.3 0.5 3.6 500 2 -- -- -- V A A V C C VDD = 3.3V + 150 mVpp (0 to 1 MHz), TA = +25C Continuous Operation Shutdown Mode VDD Falling Edge Sym Min Typ Max Unit Conditions
Thermal response with 1x1 inch dual-sided copper clad.
DS21977B-page 2
(c) 2005 Microchip Technology Inc.
MCP9805
DIGITAL INPUT/OUTPUT PIN CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = 3.0V to 3.6V, GND = Ground and TA = -20C to +125C. Parameters Input High-Level Voltage Low-Level Voltage Input Current Output (SDA) Low-Level Voltage High-Level Current (leakage) Low-Level Current Capacitance SDA and SCLK Inputs Hysteresis VHYST -- 0.5 -- V VOL IOH IOL CIN -- -- 6 -- -- -- -- 5 0.4 1 -- -- V A mA pF IOL= 3 mA VOH = 3.6V VOL = 0.6V VIH VIL IIN 2.1 -- -- -- -- -- -- 0.8 5 V V A Sym Min Typ Max Units Conditions Serial Input/Output (SCLK, SDA, A0, A1, A2)
Graphical Symbol Description
SDA & SCLK INPUTS Voltage Voltage VDD VDD VIH VIL time Current Current IOL VOL time SDA OUTPUT
IIN time
IOH time
(c) 2005 Microchip Technology Inc.
DS21977B-page 3
MCP9805
SERIAL INTERFACE TIMING CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = 3.0V to 3.6V, GND = Ground, TA = -20C to +125C, CL = 80 pF and all limits measured to 50% point. Parameters 2-Wire SMBus/Standard Mode Serial Port Clock Frequency Low Clock High Clock Rise Time Fall Time Data Setup Before SCLK High Data Hold After SCLK Low Start Condition Setup Time Start Condition Hold Time Stop Condition Setup Time Bus Free Time Out Note: I2 Sym Min Typ Max Units Conditions
CTM Compatible Interface (Note) fSC tLOW tHIGH tR tF 10 4.7 4.0 -- -- 250 300 4.7 4.0 4.0 4.7 25 -- -- -- -- -- -- -- -- -- -- -- 40 100 -- -- 1000 300 -- -- -- -- -- -- 50 kHz s s ns ns ns ns s s s s ms (VIL MAX - 0.15V) to (VIH MIN + 0.15V) (VIH MIN + 0.15V) to (VIL MAX - 0.15V)
tSU-DATA tHD-DATA tSU-START tHD-START tSU-STOP tB-FREE tOUT
The serial interface specification min./max. limits are specified by characterization (not production tested).
Timing Diagram
tH-START tSU-START SCLK tHIGH tLOW tB-FREE tSU-STOP
SDA tOUT tSU-DATA START Condition tH-DATA Data Transmission STOP Condition
tR, tF
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = 3.0V to 3.6V, GND = Ground. Parameters Temperature Ranges Specified Temperature Range Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 8L-DFN Thermal Resistance, 8L-TSSOP Note 1: JA JA -- -- 41 123.7 -- -- C/W C/W TA TA TA -20 -40 -65 -- -- -- +125 +125 +150 C C C Note 1 Sym Min Typ Max Units Conditions
Operation in this range must not cause TJ to exceed Maximum Junction Temperature (+150C).
DS21977B-page 4
(c) 2005 Microchip Technology Inc.
MCP9805
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise noted: VDD = 3.0V to 3.6V, GND = Ground, Cde_cap = 0.1 F
3.0 Temperature Accuracy (C)
VDD= 3.3V to 3.6V
500 450 400
VDD = 3.3V to 3.6V
2.0 1.0 0.0 -1.0 -2.0 -3.0 -40 -20 0 20 40 60 TA (C) 80 100 120 IDD (A)
Spec. Limits
350 300 250 200 150 100 -40 -20 0 20 40 60 TA (C) 80 100 120
FIGURE 2-1: Accuracy.
Average Temperature
FIGURE 2-4: Temperature.
2.00
Supply Current vs. Ambient
70% 60% Occurrences 50% 40% 30% 20% 10% 0% 0.00 0.25 0.50 0.75 -1.00 -0.75 -0.50 -0.25 1.00
TA = +95C VDD = 3.3V 120 samples
VDD = 3.3V to 3.6V
1.50 ISHDN (A)
1.00
0.50
0.00 -40 -20 0 20 40 60 TA (C ) 80 100 120
Temperature Accuracy (C)
FIGURE 2-2: Temperature Accuracy Histogram, TA = +95C.
70% 60% Occurrences 50% 40% 30% 20% 10% 0% -1.00 -0.75 -0.50 -0.25 0.00 0.25 0.50 0.75 1.00
TA = +75C VDD = 3.3V 120 samples
FIGURE 2-5: Shutdown Current vs. Ambient Temperature.
3 2.5 VPOR (V) 2 1.5 1 0.5 0 -40 -20 0 20 40 60 TA (C) 80 100 120
Temperature Accuracy (C)
FIGURE 2-3: Temperature Accuracy Histogram, TA = +75C.
FIGURE 2-6: Power-on Reset Threshold Voltage vs. Ambient Temperature.
(c) 2005 Microchip Technology Inc.
DS21977B-page 5
MCP9805
Note: Unless otherwise noted: VDD = 3.0V to 3.6V, GND = Ground, Cde_cap = 0.1 F.
0.4 Event & SDA V OL (V)
IOL = 3mA
48
VOL = 0.6V
42 SDA I OL (mA) 36 30 24 18 12 6 -40 -20 0 20 40 60 TA (C) 80 100 120
VDD = 3.3V VDD = 3.0V VDD = 3.6V
0.3 0.2 0.1
Event, VDD = 3.0V to 3.6V SDA, VDD = 3.0V VDD = 3.3V VDD = 3.6V
0 -40 -20 0 20 40 60 TA (C) 80 100 120
FIGURE 2-7: Event and SDA VOL vs. Ambient Temperature.
FIGURE 2-10: Temperature.
3.0
SDA IOL vs. Ambient
VDD = 3.0V to 3.6V
Temperature Accuracy (C)
125 110 tCONV (ms) 95 80 65 50 35 -40 -20 0 20 40 60 TA (C) 80 100 120
2.0 1.0 0.0 -1.0 -2.0 -3.0 -40 -20 0 20 40 60 TA (C) 80 100 120
VDD = 3.0V VDD = 3.6V PSRDC = 0.3C/V
FIGURE 2-8: Conversion Rate vs. Ambient Temperature.
1.0
FIGURE 2-11: VDD.
120% Thermal Response (%)
Temperature Accuracy vs.
Normalized Temp. Error (C)
PSRAC, VDD = 3.3V + 150mVPP (AC)
TA = 25C +25C
100% 80% 60% 40% 20%
22C (Air) to +125C (Oil bath) TSSOP-8 DFN-8
0.5
0.0
-0.5
No decoupling capacitor
-1.0 100 100
1k 1k
1,000
10k 10k Frequency (Hz)
10,000
100k 100k
100,000
1,000,000
1M 1M
0% -2 0 2 4 6 8 Time (s) 10 12 14 16
FIGURE 2-9: Frequency.
Power Supply Rejection vs.
FIGURE 2-12: Response.
Package Thermal
DS21977B-page 6
(c) 2005 Microchip Technology Inc.
MCP9805
3.0 PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
DFN/TSSOP 1 2 3 4 5 6 7 8
PIN FUNCTION TABLES
Symbol A0 A1 A2 GND SDA SCLK Event VDD Slave Address Slave Address Slave Address Ground Serial Data Line Serial Clock Line Temperature Event Output Power Pin Function
3.1
Slave Address Pins (A0, A1, A2 )
3.4
A0, A1 and A2 are device slave address input pins. The address pins correspond to the Least Significant bits (LSbs) of the address byte (see Section 5.1.4 "Address Byte"). The Most Significant bits A6, A5, A4, A3 are factory set. This is shown in Table 3-2.
Open-Drain Serial Clock Line (SCLK)
The SCLK is a clock input pin. All communication and timing is relative to the signal on this pin. The clock is generated by the host or master controller on the bus. (See Section 5.0 "Serial Communication").
TABLE 3-2:
Device MCP9805 Note:
MCP9805 ADDRESS BYTE
Address Code A6 A5 A4 A3 0 0 1 1 Slave Address A2 X A1 X A0 X
3.5
Open-Drain Temperature Event Output pin (Event)
User-selectable address is shown by X.
The MCP9805 Event pin is an open-drain output. The device outputs a signal when the ambient temperature goes beyond the user-programmed temperature limit. (see Section 4.2.3 "Event Output Configuration").
3.2
Ground Pin (GND) 3.6 Power Pin (VDD)
VDD is the power pin. The operating voltage range, as specified in the DC electrical specification table, is applied on this pin.
The GND pin is the system ground pin.
3.3
Open-Drain Serial Data Line (SDA)
SDA is a bidirectional input/output pin, used to serially transmit data to/from the host controller. This pin requires a pull-up resistor. (See Section 5.0 "Serial Communication").
(c) 2005 Microchip Technology Inc.
DS21977B-page 7
MCP9805
4.0 FUNCTIONAL DESCRIPTION
The MCP9805 temperature sensors consist of a band gap temperature sensor, a Delta-Sigma Analog-to-Digital Converter ( ADC) and user-programmable registers using a 2-wire SMBus/Standard mode I2C compatible serial interface protocol. Figure 4-1 shows a block diagram of the register structure.
Event Output Hysteresis Continuous Conversion or Shutdown Critical Boundary Trip Lock Event Boundary Window Lock bit Clear Event Output Interrupt Event Output Status Enable/Disable Event Output Critical Event Output only Event Output Polarity, Active-High/Low Event Output Comparator/Interrupt Configuration Register Temperature Register (TA) Temperature Upper-Boundary (TUPPER) Temperature Lower-Boundary (TLOWER) Critical Temperature Limit (TCRIT) Manufacturer Identification Register Device Identification and Revision Register Device Capability Register Measurement Resolution Measurement Range Measurement Accuracy Temperature Event Output ADC Band Gap Temperature Sensor
Register Pointer
SMBus/Standard I2CTM Interface
A0
A1
A2
Event
VDD
GND
SDA
SCLK
FIGURE 4-1:
Register Structure Block Diagram.
DS21977B-page 8
(c) 2005 Microchip Technology Inc.
MCP9805
4.1 Registers
The MCP9805 has several registers that are user-accessible. These registers include the Capability register, Configuration register, Event Temperature Upper-Boundary and Lower-Boundary Trip registers, Critical Temperature Trip register, Temperature register, Manufacturer Identification register and Device Identification register. The Temperature register is read-only, used to access the ambient temperature data. The data is loaded in parallel to this register after tCONV. The Event Temperature Upper-Boundary and Lower-Boundary Trip registers are read/writes. If the ambient temperature drifts beyond the user-specified limits, the MCP9805 outputs a signal using the Event pin (refer to Section 4.2.3 "Event Output Configuration"). In addition, the Critical Temperature Trip register is used to provide an additional critical temperature limit. The Capability register is used to provide bits describing the MCP9805's capability in measurement resolution, measurement range and device accuracy. The device Configuration register provides access to configure the MCP9805's various features. These registers are described in further detail in the following sections. The registers are accessed by sending a Register Pointer to the MCP9805 using the serial interface. This is an 8-bit write-only pointer. However, the three Least Significant bits (3-LSbs) are used as pointers and all unused bits (bits 7-3) need to be cleared or set to `0'. Register 4-1 describes the pointer or the address of each register.
REGISTER 4-1:
REGISTER ADDRESS POINTER (WRITE-ONLY)
W-0 0 bit 7 W-0 0 W-0 0 W-0 0 W-0 0 W-0 P2 W-0 P1 W-0 P0 bit 0
bit 7-3
Writable Bits: Write `0' Bits 7-3 must always be cleared or written to `0'. This device has additional registers that are reserved for test and calibration. If these registers are accessed, the device may not perform according to the specification.
bit 2-0
Pointer Bits: 000 = Capability register 001 = Configuration register (CONFIG) 010 = Event Temperature Upper-Boundary Trip register (TUPPER) 011 = Event Temperature Lower-Boundary Trip register (TLOWER) 100 = Critical Temperature Trip register (TCRIT) 101 = Temperature register (TA) 110 = Manufacturer ID register 111 = Device ID/Revision register
Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
(c) 2005 Microchip Technology Inc.
DS21977B-page 9
MCP9805
4.1.1 CAPABILITY REGISTER
This is a read-only register used to identify the temperature sensor capability. In this case, the MCP9805 is capable of providing temperature at 0.25C resolution, measuring temperature below and above 0C, providing 1C and 2C accuracy over the active and monitor temperature ranges (respectively) and providing user-programmable temperature event boundary trip limits. Register 4-2 describes the Capability register. These functions are described in further detail in the following sections.
REGISTER 4-2:
Upper-Half: U-0 -- bit 15 U-0 --
CAPABILITY REGISTER (READ-ONLY)
U-0 -- U-0 -- U-0 --
ADDRESS `0000 0000'b
U-0 -- U-0 -- bit 8
U-0 --
Lower-Half: U-0
U-0 --
U-0
R-0 R-1 Resolution
R-1 Meas. Range
R-1 Accuracy
bit 7 bit 15-5 bit 4-3
R-1 Temp. Event bit 0
bit 2
bit 1
bit 0
Unimplemented: Read as `0' RESOLUTION bits: 00 = 0.5 C/LSb 01 = 0.25 C/LSb (default resolution) 10 = 0.125 C/LSb 11 = 0.0625 C/LSb TEMPERATURE MEASUREMENT RANGE (Meas. Range) bit: 0 = TA = 0x0000 (Hexadecimal) for temperature below 0C 1 = The part can measure temperature below 0C ACCURACY bit: 0 = Accuracy 2C from +75C to +95C (Active Range) and 3C from +40C to +125C (Monitor Range) 1 = Accuracy 1C from +75C to +95C (Active Range) and 2C from +40C to +125C (Monitor Range) BASIC CAPABILITY (Temp. Event) bit: 0 = No defined function (This bit will never be cleared or set to `0'). 1 = The part has temperature boundary trip limits (TUPPER/TLOWER/TCRIT registers) and a temperautre event output (JC 42.4 required feature).
Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
DS21977B-page 10
(c) 2005 Microchip Technology Inc.
MCP9805
4.1.2 SENSOR CONFIGURATION REGISTER (CONFIG)
The MCP9805 has a 16-bit Configuration register (CONFIG) that allows the user to set various functions for a robust temperature monitoring system. Bits 10 thru 0 are used to select Event output boundary hysteresis, device Shutdown or Low-Power mode, temperature boundary and critical temperature lock, temperature Event output enable/disable. In addition, the user can select the Event output condition (output set for TUPPER and TLOWER temperature boundary or TCRIT only), read Event output status and set Event output polarity and mode (Comparator Output or Interrupt Output mode). The temperature hysteresis bits 10 and 9 can be used to prevent output chatter when the ambient temperature gradually changes beyond the user-specified temperature boundary (see Section 4.2.2 "Temperature Hysteresis (THYST)". The Continuous Conversion or Shutdown mode is selected using bit 8. In Shutdown mode, the band gap temperature sensor circuit stops converting temperature and the Ambient Temperature register (TA) holds the previous successfully converted temperature data (see Section 4.2.1 "Shutdown Mode"). Bits 7 and 6 are used to lock the user-specified boundaries TUPPER, TLOWER and TCRIT to prevent an accidental rewrite. Bits 5 thru 0 are used to configure the temperature Event output pin. All functions are described in Register 4-3 (see Section 4.2.3 "Event Output Configuration").
REGISTER 4-3:
Upper-Half: U-0 -- bit 15 U-0 --
CONFIGURATION REGISTER (CONFIG) ADDRESS `0000 0001'b
U-0 -- U-0 -- U-0 -- R/W-0 R/W-0 THYST R/W-0 SHDN bit 8
Lower-Half: R/W-0 R/W-0 Crit. Lock Win. Lock bit 7
R/W-0 Int. Clear
R-0 R/W-0 Event Stat. Event Cnt.
R/W-0 Event Sel.
R/W-0 Event Pol.
R/W-0 Event Mod. bit 0
bit 15-11 Unimplemented: Read as `0' bit 10-9 Limit Hysteresis (THYST) bits: 00 = 0C (power-up default) 01 = 1.5C 10 = 3.0C 11 = 6.0C (Refer to Section 4.2.3 "Event Output Configuration") bit 8 Shutdown Mode (SHDN) bit: 0 = Continuous Conversion (power-up default) 1 = Shutdown (Low-Power mode) In shutdown, all power-consuming activities are disabled, though all registers can be written to or read. This bit cannot be set `1' when either of the lock bits is set (bit 6 and bit 7). However, it can be cleared `0' for Continuous Conversion while locked. (Refer to Section 4.2.1 "Shutdown Mode") bit 7 TCRIT Lock Bit (Crit. Lock) bit: 0 = Unlocked. TCRIT register can be written. (power-up default) 1 = Locked. TCRIT register cannot be written to. When enabled, this bit remains set `1' or locked until cleared by internal reset (Section 4.3 "Summary of Power-up Default"). This bit does not require a double-write. . Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
(c) 2005 Microchip Technology Inc.
DS21977B-page 11
MCP9805
REGISTER 4-3:
Upper-Half: U-0 -- bit 15
CONFIGURATION REGISTER (CONFIG) ADDRESS `0000 0001'b (CONTINUED)
U-0 -- U-0 -- U-0 -- R/W-0 R/W-0 THYST R/W-0 SHDN bit 8
U-0 --
Lower-Half: R/W-0 R/W-0 Crit. Lock Win. Lock bit 7 bit 6
R/W-0 Int. Clear
R-0 R/W-0 Event Stat. Event Cnt.
R/W-0 Event Sel.
R/W-0 Event Pol.
R/W-0 Event Mod. bit 0
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
TUPPER and TLOWER Boundary Window Lock (Win. Lock) bit: 0 = Unlocked. TUPPER and TLOWER registers can be written. (power-up default) 1 = Locked. TUPPER and TLOWER registers cannot be written. When enabled, this bit remains set `1' or locked until cleared by internal reset (Section 4.3 "Summary of Power-up Default"). This bit does not require a double-write. Interrupt Clear (Int. Clear) bit: 0 = No effect. (power-up default) 1 = Clear interrupt output. When read this bit returns `0'. Event Output Status (Event Stat.) bit: 0 = Event output is not asserted by the device. (power-up default) 1 = Event output is asserted as a comparator/interrupt or critical temperature output. Event Output Control (Event Cnt.) bit: 0 = Disabled. (power-up default) 1 = Enabled. This bit can not be altered when either of the lock bits is set (bit 6 and bit 7). Event Output Select (Event Sel.) bit: 0 = Event output for TUPPER, TLOWER and TCRIT. (power-up default) 1 = TA TCRIT only. (TUPPER and TLOWER temperature boundaries are disabled.) When the Alarm Window Lock bit is set `1' (bit 6), this bit cannot be altered until unlocked. Event Output Polarity (Event Pol.) bit: 0 = Active-low. (power-up default) 1 = Active-high. This bit cannot be altered when either of the lock bits is set (bit 6 and bit 7). Event Output Mode (Event Mod.) bit: 0 = Comparator output. (power-up default) 1 = Interrupt output. This bit cannot be altered when either of the lock bits is set (bit 6 and bit 7).
. Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
DS21977B-page 12
(c) 2005 Microchip Technology Inc.
MCP9805
4.1.3 TEMPERATURE EVENT UPPER/LOWER/CRITICAL BOUNDARY TRIP REGISTERS (TUPPER/TLOWER/TCRIT)
The MCP9805 has a 16-bit read/write Event output Temperature Upper-Boundary Trip register (TUPPER), a 16-bit Lower-Boundary Trip register (TLOWER) and a 16-bit Critical Boundary Trip register (TCRIT) that contains 11-bit data in two's compliment format (0.25 C/LSb). This data represents the maximum and minimum temperature boundary or temperature window that can be used to monitor ambient temperature. If this feature is enabled (Section 4.1.2 "Sensor Configuration Register (CONFIG)") and the ambient temperature exceeds the specified boundary or window, the MCP9805 asserts an Event output. (Refer to Section 4.2.3 "Event Output Configuration").
REGISTER 4-4:
Upper-Half: U-0 -- bit 15
UPPER/LOWER/CRITICAL TEMPERATURE BOUNDARY TRIP REGISTERS (TUPPER/TLOWER/TCRIT) ADDRESS `0000 0010'b/`0000 0011'b/`0000 0100'b
U-0 -- U-0 -- R/W-0 SIGN R/W-0 R/W-0 R/W-0 R/W-0 27 C/LSb 26 C/LSb 25 C/LSb 24 C/LSb bit 8
Lower-Half: R/W-0 R/W-0 3 C/LSb 2 C/LSb 2 2 bit 7 bit 15-13 bit 12
R/W-0 21 C/LSb
R/W-0 20 C/LSb
R/W-0 2-1 C/LSb
R/W-0 2-2 C/LSb
U-0 --
U-0 -- bit 0
bit 11-2 bit 1-0
Unimplemented: Read as `0' SIGN bit: 0 = TA 0C 1 = TA < 0C TUPPER/TLOWER/TCRIT bits: Temperature boundary trip data in two's compliment format. Unimplemented: Read as `0'
Note: This table reflects the three 16-bit registers TUPPER, TLOWER and TCRIT located at address `0000 0010'b, `0000 0011'b and `0000 0100'b, respectively (see Register 4-1).
Legend: R = Readable bit -n = Value at POR W = Writable bit `1' = bit is set U = Unimplemented bit, read as `0' `0' = bit is cleared x = bit is unknown
(c) 2005 Microchip Technology Inc.
DS21977B-page 13
MCP9805
4.1.4 AMBIENT TEMPERATURE REGISTER (TA) EQUATION 4-1:
The MCP9805 uses a band gap temperature sensor circuit to output analog voltage proportional to absolute temperature. An internal ADC is used to convert the analog voltage to a digital word. The converter resolution is set to 0.25 C/LSb + sign (11-bit data). The digital word is loaded to a 16-bit read-only Ambient Temperature register (TA) that contains 11-bit temperature data in two's complement format. The TA register bits (bits 12 thru 0) are double-buffered. Therefore, the user can access the register while, in the background, the MCP9805 performs an analog-to-digital conversion of the band gap temperature sensor. The temperature data from the ADC is loaded in parallel to TA at tCONV refresh rate. The TA magnitude in decimal to ambient temperature conversion is shown in Equation 4-1:
DECIMAL CODE TO TEMPERATURE CONVERSION
T A = Code x 2
-2
Where: TA = Ambient Temperature (C) Code = MCP9805 output magnitude in decimal In addition, the TA register uses three bits (bits 15, 14 and 13) to reflect the Event pin state. This allows the user to identify the cause of the Event output trigger (see Section 4.2.3 "Event Output Configuration"); bit 15 is set to `1' if TA is greater than or equal to TCRIT, bit 14 is set to `1' if TA is greater than TUPPER and bit 13 is set to `1' if TA is less than TLOWER. The TA register bit assignment and boundary conditions are described in Register 4-5.
REGISTER 4-5:
Upper-Half: R-0 TA Vs. TCRIT bit 15
AMBIENT TEMPERATURE REGISTER (TA) ADDRESS `0000 0101'b
R-0 R-0 TA Vs. TUPPER TA Vs. TLOWER R-0 SIGN R-0 R-0 R-0 R-0 27 C/LSb 26 C/LSb 25 C/LSb 24 C/LSb bit 8
Lower-Half: R-0 R-0 3 C/LSb 2 C/LSb 2 2 bit 7 bit 15
R-0 21 C/LSb
R-0 20 C/LSb
R-0 2-1 C/LSb
R-0 2-2 C/LSb
U-0 --(2)
U-0 -- bit 0
TA vs. TCRIT(1) bit: 0 = TA < TCRIT 1 = TA TCRIT bit 14 TA vs. TUPPER(1) bit: 0 = TA TUPPER 1 = TA > TUPPER bit 13 TA vs. TLOWER(1) bit: 0 = TA TLOWER 1 = TA < TLOWER bit 12 SIGN bit: 0 = TA 0C 1 = TA < 0C Note 1: Not affected by the status of the Event output configuration (bits 5 to 0 of CONFIG) and THYST = 0C, Register 4-3. 2: Bit 1 may remain set `1' for some devices indicating 2-3 C/LSb or 0.125C temperature resolution, depending on the state of the device calibration code. Legend: R = Readable bit -n = Value at POR W = Writable bit `1' = bit is set U = Unimplemented bit, read as `0' `0' = bit is cleared x = bit is unknown
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(c) 2005 Microchip Technology Inc.
MCP9805
REGISTER 4-5:
Upper-Half: R-0 TA Vs. TCRIT bit 15
AMBIENT TEMPERATURE REGISTER (TA) ADDRESS `0000 0101'b (CONTINUED)
R-0 R-0 TA Vs. TUPPER TA Vs. TLOWER R-0 SIGN R-0 R-0 R-0 R-0 27 C/LSb 26 C/LSb 25 C/LSb 24 C/LSb bit 8
Lower-Half: R-0 R-0 23 C/LSb 22 C/LSb bit 7 bit 11-2
R-0 21 C/LSb
R-0 20 C/LSb
R-0 R-0 2-1 C/LSb 2-2 C/LSb
U-0 --(2)
U-0 -- bit 0
Ambient Temperature (TA) bits: 10-bit Ambient Temperature data in two's compliment format. bit 1, 0 Unimplemented: Read as `0' (Note 2) Note 1: Not affected by the status of the Event output configuration (bits 5 to 0 of CONFIG) and THYST = 0C, Register 4-3. 2: Bit 1 may remain set `1' for some devices indicating 2-3 C/LSb or 0.125C temperature resolution, depending on the state of the device calibration code. Legend: R = Readable bit -n = Value at POR W = Writable bit `1' = bit is set U = Unimplemented bit, read as `0' `0' = bit is cleared x = bit is unknown
(c) 2005 Microchip Technology Inc.
DS21977B-page 15
MCP9805
4.1.5 MANUFACTURER ID REGISTER This register is used to identify the device manufacturer in order to perform manufacturer-specific operations. The manufacturer ID for the MCP9805 is 0x0054 (hexadecimal).
REGISTER 4-1:
Upper-Half: R-0 bit 15 R-0
MANUFACTURER ID REGISTER (READ-ONLY) ADDRESS `0000 0110'b
R-0 R-0 R-0 R-0 R-0 R-0 bit 8 Lower-Half: R-0 bit 7 R-1 R-0 R-1 R-0 R-1 R-0 R-0 bit 0 Manufacturer ID
Manufacturer ID
Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
4.1.6
DEVICE ID AND REVISION REGISTER
The upper byte of this register is used to specify the device identification and the lower byte is used to specify device revision. The device ID for the MCP9805 is 0x00 (hex).
The revision begins with 0x00 (hex) for the first release, with the number being incremented as revised versions are released.
REGISTER 4-2:
Upper-Half: R-0 bit 15 R-0
DEVICE ID AND DEVICE REVISION (READ-ONLY) ADDRESS `0000 0111'b
R-0 R-0 Device ID bit 8 Lower-Half: R-0 bit 7 R-0 R-0 R-0 R-0 R-0 R-0 R-0 bit 0 Device Revision R-0 R-0 R-0 R-0
Legend: R = Readable bit - n = Value at POR W = Writable bit `1' = Bit is set U = Unimplemented bit, read as `0' `0' = Bit is cleared x = Bit is unknown
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MCP9805
4.2
4.2.1
Sensor Feature Description
SHUTDOWN MODE
Shutdown mode disables all power-consuming activities (including temperature sampling operations) while leaving the serial interface active. This mode is selected by setting bit 8 of CONFIG to `1'. In this mode, the device consumes ISHDN. It remains in this mode until bit 8 is cleared `0' to enable Continuous Conversion mode, or until power is recycled. The Shutdown bit (bit 8) cannot be set to `1' while bits 6 and 7 of CONFIG (Lock bits) are set to `1'. However, it can be cleared `0' or returned to Continuous Conversion while locked. In Shutdown mode, all registers can be read or written. However, the serial bus activity increases the shutdown current. In addition, if the device is shutdown while the Event pin is asserted as active-low or deasserted active-low (see Section 4.2.3.1 "Comparator Mode" and Section 4.2.3.2 "Interrupt Mode"), the device will retain the active-low state. This increases the shutdown current due to the additional Event output pull-down current.
The Event output can also be used as a critical temperature output using bit 2 of CONFIG (critical output only). When this feature is selected, the Event output becomes a comparator output. In this mode, the interrupt output configuration (bit 0 of CONFIG) is ignored.
4.2.3.1
Comparator Mode
Comparator mode is selected using bit 0 of CONFIG. In this mode, the Event output is asserted as active-high or active-low using bit 1 of CONFIG. Figure 4-2 shows the conditions that toggle the Event output. If the device enters Shutdown mode with asserted Event output, the output remains asserted during Shutdown. The device must be operating in Continuous Conversion mode for tCONV; the TA vs. TUPPER, TLOWER and TCRIT boundary conditions need to be satisfied in order for the Event output to deassert. Comparator mode is useful for thermostat-type applications, such as turning on a cooling fan or triggering a system shutdown when the temperature exceeds a safe operating range.
4.2.3.2
Interrupt Mode
4.2.2
TEMPERATURE HYSTERESIS (THYST)
A hysteresis of 0C, 1.5C, 3C or 6C can be selected for the TUPPER, TLOWER and TCRIT temperate boundaries using bits 10 and 9 of CONFIG. The hysteresis applies for decreasing temperature only (hot to cold), or as temperature drifts below the specified limit. The TUPPER, TLOWER and TCRIT boundary conditions are described graphically in Figure 4-2.
Interrupt mode is selected using bit 0 of CONFIG. In this mode, the Event output is asserted as active-high or active-low using bit 1 of CONFIG. The output is deasserted by setting `1' to bit 5 of CONFIG (interrupt clear). Shutting down the device will not reset or deassert the Event output. However, clearing the interrupt using bit 5 of CONFIG while in Shutdown mode will deassert the Event output. This mode is ignored when the Event output is used as critical temperature output only (bit 2 of CONFIG). Interrupt mode applies to interrupt-driven, microcontroller-based systems. The microcontroller receiving the interrupt will have to acknowledge the interrupt by setting `1' to bit 5 of CONFIG.
4.2.3
EVENT OUTPUT CONFIGURATION
The Event output can be enabled using bit 3 of CONFIG (Event output control bit) and can be configured as either a comparator output or as Interrupt Output mode using bit 0 of CONFIG (Event mode). The polarity can also be specified as an active-high or active-low using bit 1 of CONFIG (Event polarity). When the ambient temperature increases above the critical temperature limit, the Event output is forced to a comparator output (regardless of bit 0 of CONFIG). When the temperature drifts below the critical temperature limit, the Event output automatically returns to the state specified by bit 0 of CONFIG. The status of the Event output can be read using bit 4 of CONFIG (Event status). Bit 7 and 6 of the CONFIG register can be used to lock the TUPPER, TLOWER and TCRIT registers. The bits prevent false triggers at the Event output due to an accidental rewrite to these registers.
(c) 2005 Microchip Technology Inc.
DS21977B-page 17
MCP9805
TCRIT - THYST TCRIT TUPPER TA TLOWER -THYST TLOWER TLOWER -THYST TUPPER - THYST TUPPER - THYST
Comparator Event Output
(Active-Low)
Interrupt S/W Int. Clear
Critical
Note: 1
2
13
4
35
*
64
2
Note 1 2 3 4 5 6 *
Event Output Boundary Conditions
Event Output Comparator Interrupt Critical 15
TA bits 14 13
H L H 0 0 0 TA TLOWER L L H 0 0 1 TA < TLOWER - THYST TA > TUPPER L L H 0 1 0 H L H 0 0 0 TA TUPPER - THYST TA TCRIT L L L 1 0 0 TA < TCRIT - THYST L H H 0 1 0 When TA TCRIT and TA < TCRIT - THYST, the Event output is in Comparator mode and bit 0 of CONFIG (Interrupt mode) is ignored.
FIGURE 4-2:
Event Output Boundary Conditions.
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(c) 2005 Microchip Technology Inc.
MCP9805
4.3 Summary of Power-up Default
The MCP9805 has an internal Power-on Reset (POR) circuit. If the power supply voltage VDD drifts below the VPOR threshold, the device resets the registers to the power-up default settings. Table 4-6 shows the power-up default summary.
TABLE 4-6:
POWER-UP DEFAULTS
Registers Register Label Capability Default Register Data (Hex) 0x000F Power-up Default Register Description 0.25 C/LSb Measures Temperature Below 0C 1C Accuracy Over Active Range Basic Capability (Event output) Comparator Mode Active-Low Output Event and Critical output Output Enabled Event Not Asserted Interrupt Cleared Event Limits Unlocked Critical Limit Unlocked Continuous Conversion 0C Hysteresis 0C 0C 0C 0C 0x0054 (hex) 0x0000 (hex)
Address (Hex) 0x00
0x01
CONFIG
0x0000
0x02 0x03 0x04 0x05 0x06 0x07
TUPPER TLOWER TCRIT TA Manufacturer ID Device ID/Device Revision
0x0000 0x0000 0x0000 0x0000 0x0054 0x0000
(c) 2005 Microchip Technology Inc.
DS21977B-page 19
MCP9805
5.0
5.1
SERIAL COMMUNICATION
2-Wire SMBus/Standard Mode I2CTM Protocol-Compatible Interface
5.1.1
DATA TRANSFER
Data transfers are initiated by a Start condition (START), followed by a 7-bit device address and a read/write bit. An Acknowledge (ACK) from the slave confirms the reception of each byte. Each access must be terminated by a Stop condition (STOP). Repeated communication is initiated after tB-FREE. This device does not support sequential register read/write. Each register needs to be addressed using the Register Pointer. This device supports the receive protocol. The register can be specified using the pointer for the initial read (see Figure 5-4). Each repeated read or receive can then be followed with a Start condition, followed by an address byte. The MCP9805 retains the previously selected register. Therefore, it expects a read from the previously-specified register (repeated pointer specification is not necessary).
The MCP9805 serial clock input (SCLK) and the bidirectional serial data line (SDA) form a 2-Wire bidirectional SMBus/Standard mode I2C compatible communication port (refer to the Digital Input/Output Pin Characteristics Table and Serial Interface Timing Characteristics Table). The following bus protocol has been defined:
TABLE 5-1:
Term Master Slave
MCP9805 SERIAL BUS PROTOCOL DESCRIPTIONS
Description The device that controls the serial bus, typically a microcontroller. The device addressed by the master, such as the MCP9805. Device receiving data from the bus. A unique signal from master to initiate serial interface with a slave. A unique signal from the master to terminate serial interface from a slave.
5.1.2
MASTER/SLAVE
Transmitter Device sending data to the bus. Receiver START STOP
The bus is controlled by a master device (typically a microcontroller) that controls the bus access and generates the Start and Stop conditions. The MCP9805 is a slave device and does not control other devices in the bus. Both master and slave devices can operate as either transmitter or receiver. However, the master device determines which mode is activated.
5.1.3
START/STOP CONDITION
Read/Write A read or write to the MCP9805 registers. ACK A receiver Acknowledges (ACK) the reception of each byte by polling the bus. A receiver Not-Acknowledges (NAK) or releases the bus to show End-of-Data (EOD). Communication is not possible because the bus is in use. The bus is in the idle state, both SDA and SCLK remain high. SDA must remain stable before SCLK becomes high in order for a data bit to be considered valid. During normal data transfers, SDA only changes state while SCLK is low.
A high-to-low transition of the SDA line (while SCLK is high) is the Start condition. All data transfers must be preceded by a Start condition from the master. If a Start condition is generated during data transfer, the MCP9805 resets and accepts the new Start condition. A low-to-high transition of the SDA line (while SCLK is high) signifies a Stop condition. If a Stop condition is introduced during data transmission, the MCP9805 releases the bus. All data transfers are ended by a Stop condition from the master. However, for continuous data reception from the previously-specified pointer (Register 4-1), a Start condition can be introduced at the end of data reception. The MCP9805 retains the previously-set pointer. Therefore, there is no need to repeat the pointer specification (see Register 5-4).
NAK
Busy Not Busy Data Valid
5.1.4
ADDRESS BYTE
Following the Start condition, the host must transmit an 8-bit address byte to the MCP9805. The address for the MCP9805 is `0011,A2,A1,A0' in binary, where the A2, A1 and A0 bits are set externally by connecting the corresponding pins to VDD `1' or GND `0'. The 7-bit address transmitted in the serial bit stream must match the selected address for the MCP9805 to respond with an ACK. Bit 8 in the address byte is a read/write bit. Setting this bit to `1' commands a read operation, while `0' commands a write operation (see Figure 5-1).
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MCP9805
5.1.6
Address Byte SCLK 1 2 3 4 5 6 7 8 9 A C K
ACKNOWLEDGE (ACK)
Each receiving device, when addressed, is obliged to generate an ACK bit after the reception of each byte. The master device must generate an extra clock pulse for ACK to be recognized. The acknowledging device pulls down the SDA line for tSU-DATA before the low-to-high transition of SCLK from the master. SDA also needs to remain pulled down for tH-DATA after a high-to-low transition of SCLK. During read, the master must signal an End-of-Data (EOD) to the slave by not generating an ACK bit (NAK) once the last bit has been clocked out of the slave. In this case, the slave will leave the data line released to enable the master to generate the Stop condition.
SDA Start
0
0
1
1 A2 A1 A0 Slave Address
Address Code
R/W
MCP9805 Response
FIGURE 5-1: 5.1.5
Device Addressing.
DATA VALID
After the Start condition, each bit of data in transmission needs to be settled for a time specified by tSU-DATA before SCLK toggles from low-to-high (see Serial Interface Timing Characteristics).
5.1.7
TIME OUT
If the SCLK stays high or low for a time specified by tOUT, the MCP9805 releases the bus and resets the serial interface. The master will have to restart the communication cycle with a Start condition. This dictates the minimum clock speed.
(c) 2005 Microchip Technology Inc.
DS21977B-page 21
MCP9805
5.2 Timing Diagram
Read 1-byte Data
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
SCLK
A P 1 P 0 A C K
SDA
S
0
0
1
1
A 2
A 1
A 0
WC K
0
0
0
0
0
P 2
Address Byte MCP9805
1 2 3 4 5 6 7
Pointer MCP9805
8 1 2 3 4 5 6 7 8
SCLK
A 2 A 1 A 0 A K D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 N A K
SDA
S
0
0
1
1
RC
P
Address Byte MCP9805 Read 2-byte Data
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
Data Master
SCLK
A P 2 P 1 P 0 A C K
SDA
S
0
0
1
1
A 2
A 1
A 0
WC K
0
0
0
0
0
Address Byte MCP9805
1 2 3 4 5 6 7 8 1
Pointer MCP9805
2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
SCLK
A 2 A 1 A 0 A RCD DDDDDD K 15 14 13 12 11 10 9 D 8 A C K D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 N A K
SDA
S
0
0
1
1
P
Address Byte MCP9805
MSb Data Master
LSb Data Master
S = START Condition P = STOP Condition
FIGURE 5-2:
Read 1-byte and 2-byte data from a Register.
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MCP9805
Write 1-byte Data
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
SCLK
A K A C K A C K
SDA
S
0
0
1
1
A 2
A 1
A 0
WC
0
0
0
0
0
P 2
P 1
P 0
D 7
D 6
D 5
D 4
D 3
D 2
D 1
D 0
P
Address Byte MCP9805
Pointer MCP9805
Data MCP9805
Write 2-byte Data
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
SCLK
A K A C K
SDA
S
0
0
1
1
A 2
A 1
A 0
WC
0
0
0
0
0
P 2
P 1
P 0
Address Byte MCP9805
Pointer MCP9805
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
DDDDDDD 15 14 13 12 11 10 9
D 8
A C K
DD 76
D 5
D 4
D 3
D 2
D 1
D 0
A C K
P
MSb Data MCP9805 S = START Condition P = STOP Condition
LSb Data MCP9805
FIGURE 5-3:
Write 1-byte and 2-byte data from a Register.
(c) 2005 Microchip Technology Inc.
DS21977B-page 23
MCP9805
Register Pointer Setting for Continuous Reception(Note)
1 2 3 4 5 6 7 8 1 2 3 4 5 6 7 8
SCLK
A P 2 P 1 P 0 A C K
SDA
S
0
0
1
1
A 2
A 1
A 0
WC K
0
0
0
0
0
Address Byte MCP9805 Receive 1-byte Data
1 2 3 4 5 6 7
Pointer MCP9805
8
1
2
3
4
5
6
7
8
SCLK
A 2 A 1 A 0 A K D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 N A K
SDA
S
0
0
1
1
RC
Address Byte MCP9805 Receive Another 1-byte Data
1 2 3 4 5 6 7 8 1 2 3
Data Master
4
5
6
7
8
SCLK
A 2 A 1 A 0 A K D 7 D 6 D 5 D 4 D 3 D 2 D 1 D 0 N A K
SDA
S
0
0
1
1
RC
Address Byte MCP9805
Data Master
Note:
User can continue to receive 1-byte or 2-byte data (depending on the specific register) indefinitely from a previously-set Register Pointer. This device does not support sequential read/write.
S = START Condition P = STOP Condition
FIGURE 5-4:
Receive 1-byte Data from Previously Set Pointer.
DS21977B-page 24
(c) 2005 Microchip Technology Inc.
MCP9805
6.0
6.1
APPLICATIONS INFORMATION
Connecting to the Serial Bus
6.2
Layout Considerations
The SDA and SCLK serial interface pins are open-drain pins that require pull-up resistors. This configuration is shown in Figure 6-1.
VDD Microcontroller MCP9805 R R R SDA SCLK Event
The MCP9805 does not require any additional components besides the master controller in order to measure temperature. However, it is recommended that a decoupling capacitor of 0.1 F to 1 F be used between the VDD and GND pins. A high-frequency ceramic capacitor is recommended. It is necessary for the capacitor to be located as close as possible to the power and ground pins of the device in order to provide effective noise protection.
6.3
Thermal Considerations
Master FIGURE 6-1: Interface.
Slave Pull-up Resistors On Serial
A potential for self-heating errors can exist if the MCP9805 SDA, SCLK and Event lines are heavily loaded with pull-ups (high current). Typically, the self-heating error is negligible because of the relatively small current consumption of the MCP9805. A temperature accuracy error of approximately 0.5C could result from self-heating if the communication pins sink/source the maximum current specified. For example, if the Event output is loaded to maximum IOL, Equation 6-1 can be used to determine the effect of self-heating.
The number of devices connected to the bus is limited only by the maximum rise and fall times of the SDA and SCLK lines. Unlike I2C specifications, SMBus does not specify a maximum bus capacitance value. Rather, the SMBus specification requires that the maximum current through the pull-up resistor be 350 A and minimum 100 A. Because of this, the value of the pull-up resistors will vary depending on the system's bias voltage (VDD). The pull-up resistor values for a 3.3 V system ranges 9 k to 33 k. Minimizing bus capacitance is still very important as it directly affects the rise and fall times of the SDA and SCLK lines. Although SMBus specifications only require the SDA and SCLK lines to pull-down 350 A, with a maximum voltage drop of 0.4 V, the MCP9805 is designed to meet a maximum voltage drop of 0.4 V, with 3 mA of current. This allows lower pull-up resistor values to be used, allowing the MCP9805 to handle higher bus capacitance. In such applications, all devices on the bus must meet the same pull-down current requirements. A possible configuration using multiple devices on the SMBus is shown in Figure 6-2. SDA SCLK MCP9805 Temperature Sensor 24LCS52 EEPROM
EQUATION 6-1:
T
EFFECT OF SELF-HEATING
+ VOL_SDA * IOL_SDA )
= JA ( V DD * I DD + V OL_Event * I OL_Event
Where: T = TJ - TA TJ = Junction Temperature TA = Ambient Temperature JA = Package Thermal Resistance VOL_Event, SDA = Event and SDA Output VOL (0.4 Vmax) IOL_Event, SDA = Event and SDA Output IOL (3 mAmax)
At room temperature (TA = +25C) with maximum IDD = 500 A and VDD = 3.6V, the self-heating due to power dissipation T is 0.2C for the DFN-8 package and 0.5C for the TSSOP-8 package.
FIGURE 6-2: SMBus.
Multiple Devices on DIMM
(c) 2005 Microchip Technology Inc.
DS21977B-page 25
MCP9805
7.0
7.1
PACKAGING INFORMATION
Package Marking Information
8-Lead DFN (MC) Example:
XXX YWW NN
ABA 536 56
8-Lead TSSOP (ST) XXXX YYWW NNN
Example: 805B 0536 256
Legend: XX...X Y YY WW NNN
e3
*
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package.
Note:
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
DS21977B-page 26
(c) 2005 Microchip Technology Inc.
MCP9805
8-Lead Plastic Dual Flat No-Lead Package (MC) 2x3x0.9 mm Body (DFN) - Saw Singulated
b p n L
D
K
E
E2
EXPOSED METAL PAD (NOTE 2) PIN 1 ID INDEX AREA (NOTE 1)
DETAIL TOP VIEW
ALTERNATE CONTACT CONFIGURATION
2 D2
1
BOTTOM VIEW
A1 A3
A
EXPOSED TIE BAR (NOTE 3)
Units Dimension Limits Number of Pins Pitch Overall Height Standoff Contact Thickness Overall Length Overall Width Exposed Pad Length Exposed Pad Width Contact Length Contact-to-Exposed Pad Contact Width n e A A1 A3 D E D2 E2 L K b .051 .059 .012 .008 .008 .031 .000 MIN
INCHES NOM 8 .020 BSC .035 .001 .008 REF. .079 BSC .118 BSC - - .016 - .010 .069 .075 .020 - .012 1.30** 1.50** 0.30 0.20 0.20 .039 .002 0.80 0.00 MAX MIN
MILLIMETERS* NOM 8 0.50 BSC 0.90 0.02 0.20 REF. 2.00 BSC 3.00 BSC - - 0.40 - 0.25 1.75 1.90 0.50 - 0.30 1.00 0.05 MAX
* Controlling Parameter ** Not within JEDEC parameters Significant Characteristic Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Exposed pad may vary according to die attach paddle size. 3. Package may have one or more exposed tie bars at ends. BSC: Basic Dimension. Theoretically exact value shown without tolerances. See ASME Y14.5M REF: Reference Dimension, usually without tolerance, for information purposes only. See ASME Y14.5M JEDEC Equivalent MO-229 VCED-2 DWG No. C04-123
Revised 09-12-05
(c) 2005 Microchip Technology Inc.
DS21977B-page 27
MCP9805
8-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm Body (TSSOP)
E E1
p
D 2 1 n B A c
L
A1
A2
Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom n p A A2 A1 E E1 D L c B .039 .033 .002 .246 .169 .114 .020 0 .004 .007 0 0 MIN
INCHES NOM 8 .026 .041 .035 .004 .251 .173 .118 .024 4 .006 .010 5 5 .043 .037 .006 .256 .177 .122 .028 8 .008 .012 10 10 1.00 0.85 0.05 6.25 4.30 2.90 0.50 MAX MIN
MILLIMETERS* NOM 8 0.65 1.05 0.90 0.10 6.38 4.40 3.00 0.60 4 0.15 0.25 5 5 1.10 0.95 0.15 6.50 4.50 3.10 0.70 8 0.20 0.30 10 10 MAX
0 0.09 0.19 0 0
* Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side. JEDEC Equivalent: MO-153 Drawing No. C04-086 Revised 07-21-05
DS21977B-page 28
(c) 2005 Microchip Technology Inc.
MCP9805
APPENDIX A: REVISION HISTORY
Revision B (September 2005)
* Added the text "for Mobile Platform Memory Module Thermal Sensor" to first bullet under Features section.
Revision A (September 2005)
* Original Release of this Document.
(c) 2005 Microchip Technology Inc.
DS21977B-page 29
MCP9805
NOTES:
DS21977B-page 30
(c) 2005 Microchip Technology Inc.
MCP9805
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device -X Grade X Temperature Range /XX Package Examples:
a) MCP9805T-BE/MC: Tape and Reel, Extended Temp., 8LD DFN pkg. MCP9805-BE/ST: Extended Temp., 8LD TSSOP pkg. MCP9805T-BE/ST: Tape and Reel, Extended Temp., 8LD TSSOP pkg.
b)
Device: MCP9805: Digital Temperature Sensor MCP9805T: Digital Temperature Sensor (Tape and Reel)
c)
Grade:
B B B
= 1C (max.) from +75C to +95C, 2C (max.) from +40C to +125C, and 3C (max.) from -20C to +125C
Temperature Range:
E
= -40C to +125C
Package:
MC = Dual Flat No Lead (2x3 mm Body), 8-lead ST = Plastic Thin Shrink Small Outline (4x4 mm Body), 8-lead
(c) 2005 Microchip Technology Inc.
DS21977B-page 31
MCP9805
NOTES:
DS21977B-page 32
(c) 2005 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, PICMASTER, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active Thermistor, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance and WiperLock are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2005, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona and Mountain View, California in October 2003. The Company's quality system processes and procedures are for its PICmicro(R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2005 Microchip Technology Inc.
DS21977B-page 33
WORLDWIDE SALES AND SERVICE
AMERICAS
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EUROPE
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**DS21977B**
08/24/05
DS21977B-page 34
(c) 2005 Microchip Technology Inc.


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